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* Upload to experimental.mesa-17.3.0-rc5-1debian-experimentalAndreas Boll2017-11-21
* Bump changelogAndreas Boll2017-11-21
* Merge tag 'mesa-17.3.0-rc5' into debian-experimentalAndreas Boll2017-11-21
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| * Update version to 17.3.0-rc5upstream-experimentalEmil Velikov2017-11-20
| * i965: Revert Gen8 aspect of VF PIPE_CONTROL workaround.Kenneth Graunke2017-11-18
| * anv/cmd_buffer: Take bo_offset into account in fast clear state addressesJason Ekstrand2017-11-17
| * anv/cmd_buffer: Advance the address when initializing clear colorsJason Ekstrand2017-11-17
| * i965/gen8+: Fix the number of dwords programmed in MI_FLUSH_DWAnuj Phogat2017-11-17
| * i965: Program DWord Length in MI_FLUSH_DWAnuj Phogat2017-11-17
| * meson: explicitly disable the build system for 17.3.xEmil Velikov2017-11-17
| * Revert "intel/fs: Use a pure vertical stride for large register strides"Matt Turner2017-11-17
| * i965/fs: Split all 32->64-bit MOVs on CHV, BXT, GLKMatt Turner2017-11-17
| * i965/fs: Fix extract_i8/u8 to a 64-bit destinationMatt Turner2017-11-17
| * tgsi/exec: fix LDEXP in softpipeNicolai Hähnle2017-11-17
| * egl/wayland: Add a fallback when fourcc query isn't supportedDerek Foreman2017-11-17
| * radv: Free temporary syncobj after waiting on it.Bas Nieuwenhuizen2017-11-17
| * radv: Free syncobj with multiple imports.Bas Nieuwenhuizen2017-11-17
| * loader/dri3: Improve dri3 thread-safetyThomas Hellstrom2017-11-17
| * intel/tools: Fix detection of enabled shader stages.Kenneth Graunke2017-11-17
| * i965: Upload invariant state once at the start of the batch on Gen4-5.Kenneth Graunke2017-11-17
| * i965: Implement another VF cache invalidate workaround on Gen8+.Kenneth Graunke2017-11-17
| * swr/rast: Faster emulated simd16 permuteTim Rowley2017-11-17
| * swr/rast: Use gather instruction for i32gather_ps on simd16/avx512Tim Rowley2017-11-17
| * i965: Add stencil buffers to cache set regardless of stencil texturingJason Ekstrand2017-11-17
| * i965: Use PTE MOCS for all external buffersJason Ekstrand2017-11-17
| * intel/blorp: Make the MOCS setting part of blorp_addressJason Ekstrand2017-11-17
| * anv/blorp: Add a device parameter to blorp_surf_for_anv_imageJason Ekstrand2017-11-17
| * intel/blorp: Use mocs.tex for depth stencilJason Ekstrand2017-11-17
| * r600: fix isoline tess factor component swapping.Dave Airlie2017-11-17
| * r600/shader: reserve first register of vertex shader.Dave Airlie2017-11-17
| * glx/dri3: Fix passing renderType into glXCreateContextAdam Jackson2017-11-17
| * glx/drisw: Fix glXMakeCurrent(dpy, None, ctx)Adam Jackson2017-11-17
| * nir/spirv: tg4 requires a samplerAlex Smith2017-11-17
| * spirv: Use correct type for sampled imagesAlex Smith2017-11-17
| * Update version to 17.3.0-rc4Emil Velikov2017-11-14
| * glsl: Allow precision mismatch on dead data with GLSL ES 1.00Tomasz Figa2017-11-13
| * i965: Make L3 configuration atom listen for TCS/TES program updates.Kenneth Graunke2017-11-13
| * autotools: Set C++ visibility flags on IntelDylan Baker2017-11-13
| * docs: Fix GL_MESA_program_debug enumsRoland Scheidegger2017-11-13
| * nir: Don't print swizzles when there are more than 4 componentsMatt Turner2017-11-13
| * glsl: Fix typo fragement -> fragmentAndreas Boll2017-11-13
| * broadcom/vc5: Remove unused v3d_compiler.cAndreas Boll2017-11-13
| * configure.ac: require xcb* for the omx/va/... when using x11 platformEmil Velikov2017-11-13
| * configure.ac: loosen --enable-glvnd check to honour eglEmil Velikov2017-11-13
| * automake: intel: correctly append to the LIBADD variableEmil Velikov2017-11-13
| * i965: disable NIR linking on HSW and belowTimothy Arceri2017-11-13
| * automake: include git_sha1.h.in in release tarballJuan A. Suarez Romero2017-11-13
| * glsl: Transform fb buffers are only active if a variable uses themNeil Roberts2017-11-13
| * glsl: add varying resources for arrays of complex typesJuan A. Suarez Romero2017-11-13
| * intel/nir: Use the correct indirect lowering masks in link_shadersJason Ekstrand2017-11-10
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