/[pkg-glibc]/glibc-package/branches/glibc-2.19/debian/patches/powerpc/local-powerpc8xx-dcbz.diff
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Contents of /glibc-package/branches/glibc-2.19/debian/patches/powerpc/local-powerpc8xx-dcbz.diff

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Revision 6096 - (show annotations) (download)
Wed May 21 12:00:44 2014 UTC (3 months ago) by aurel32
File size: 2162 byte(s)
  - patches/any/local-dynamic-resolvconf.diff: new patch from the eglibc
    tree to dynamically take into account changes in resolv.conf.
  - patches/powerpc/local-powerpc8xx-dcbz.diff: new patch from the eglibc
    tree to workaround dcbz issues on PowerPC 8XX CPUs.
  - patches/sh4/local-fpscr_values.diff: new patch from eglibc tree to
    export the ___fpscr_values symbol on SH4.
1 --- a/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c
2 +++ b/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c
3 @@ -25,9 +25,21 @@
4 /* Scan the Aux Vector for the "Data Cache Block Size" entry. If found
5 verify that the static extern __cache_line_size is defined by checking
6 for not NULL. If it is defined then assign the cache block size
7 - value to __cache_line_size. */
8 + value to __cache_line_size. This is used by memset to
9 + optimize setting to zero. We have to detect 8xx processors, which
10 + have buggy dcbz implementations that cannot report page faults
11 + correctly. That requires reading SPR, which is a privileged
12 + operation. Fortunately 2.2.18 and later emulates PowerPC mfspr
13 + reads from the PVR register. */
14 #define DL_PLATFORM_AUXV \
15 case AT_DCACHEBSIZE: \
16 + if (__LINUX_KERNEL_VERSION >= 0x020218) \
17 + { \
18 + unsigned pvr = 0; \
19 + asm ("mfspr %0, 287" : "=r" (pvr)); \
20 + if ((pvr & 0xffff0000) == 0x00500000) \
21 + break; \
22 + } \
23 __cache_line_size = av->a_un.a_val; \
24 break;
25
26 --- a/sysdeps/unix/sysv/linux/powerpc/libc-start.c
27 +++ b/sysdeps/unix/sysv/linux/powerpc/libc-start.c
28 @@ -68,11 +68,24 @@
29 rtld_fini = NULL;
30 }
31
32 - /* Initialize the __cache_line_size variable from the aux vector. */
33 + /* Initialize the __cache_line_size variable from the aux vector.
34 + This is used by memset to optimize setting to zero. We have to
35 + detect 8xx processors, which have buggy dcbz implementations that
36 + cannot report page faults correctly. That requires reading SPR,
37 + which is a privileged operation. Fortunately 2.2.18 and later
38 + emulates PowerPC mfspr reads from the PVR register. */
39 for (ElfW (auxv_t) * av = auxvec; av->a_type != AT_NULL; ++av)
40 switch (av->a_type)
41 {
42 case AT_DCACHEBSIZE:
43 + if (__LINUX_KERNEL_VERSION >= 0x020218)
44 + {
45 + unsigned pvr = 0;
46 +
47 + asm ("mfspr %0, 287" : "=r" (pvr) :);
48 + if ((pvr & 0xffff0000) == 0x00500000)
49 + break;
50 + }
51 __cache_line_size = av->a_un.a_val;
52 break;
53 }

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